logical fab 改DRAM fab 变化(equipment, design and process)不少

来源: 于 2026-02-03 19:14:42 [旧帖] [给我悄悄话] 本文已被阅读：次

Capacitor formation tools (biggest gap)

Logic fabs do not have:

  • High-aspect-ratio deep trench etch (or stack capacitor etch)

  • ALD high-k dielectric (ZrO? / HfO? / Al?O? stacks)

  • Metal fill for capacitors (TiN / Ru)

  • Precise dielectric thickness control at scale

Item Estimate
Tool replacement/addition $3–7B
Process development 3–5 years
Yield ramp 1–2 years
Total time ~5–7 years
Risk Extremely high

 

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