Compute-in-Memory (CIM) and Processing-in-Memory (PIM) are widely seen as the true architectural leap beyond GPUs, because they attack the single biggest bottleneck in AI:
moving data from memory to compute.
Below is a clear, executive-level breakdown of what CIM/PIM really are, why they matter, and where the technology stands today.
CIM — Compute Inside Memory Cells
Compute is done within the memory array itself (often analog).
Example:
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SRAM/DRAM/Flash cell performs a partial MAC operation
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Use Ohm’s law + Kirchhoff’s law to perform vector-matrix operations
This is extremely energy-efficient and parallel.
CIM = full fusion of compute + memory.
PIM — Compute Near Memory
Compute is done next to memory using small accelerator blocks.
Examples:
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DRAM with integrated ALUs
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HBM stack with logic layer (HBM-PIM)
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Samsung’s AXDIMM, HBM-PIM
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Near-memory FPGA tiles
PIM = memory with local compute to reduce data movement.
Commercial / Near-Commercial Leaders
Samsung
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AXDIMM PIM DDR4/5
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HBM-PIM stacked DRAM with logic layer
Best positioned for mainstream adoption.
SK Hynix
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HBM3E PIM prototypes
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Dataflow-style logic layers
Intel / Micron
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Exploring NDP (near-data processing)
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Not as far along as Samsung.
Startups (Most Innovative)
Mythic AI
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Analog compute-in-memory (flash-based) for edge inference
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Excellent efficiency, accuracy challenges
Rain AI
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Next-gen analog CIM tile arrays
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Model weights stored directly in analog arrays
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Very promising for low-power LLM inference
MemryX
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Near-memory compute for edge AI
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Simplified dataflow architecture
Cerebras (partially CIM-like)
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Wafer-scale engine with distributed local memory
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Not CIM, but memory-centric and post-GPU
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