招人:SoC Physical Design Engineer

来源: azurelan 2013-07-12 16:03:40 [] [旧帖] [给我悄悄话] 本文已被阅读: 次 (19984 bytes)

SoC Physical Design Engineer ( San Jose, CA)

This individual will contribute from RTL to GDS on block level designs. Specific tasks will include but not limiting the following:

-          design floor planning,

-          place and route,

-          CTS, timing analysis

-          physical design verification.

 

Job Requirements:
-MSEE or MSCS w/ 3+ yrs experience of digital physical design.
-Experience with RTL 2 GDSII concepts and flows.
-Requires good programming/scripting skills in Perl, TCL or Python.
-STA experience
-Experience with industry standard toolsets from Cadence or Synopsys.
-Experience of physical verification.
-Excellent communication skills, both written and verbal.
-Ability to work in a team environment

 

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回复:招人:SoC Physical Design Engineer -上山下乡- 给 上山下乡 发送悄悄话 上山下乡 的博客首页 (132 bytes) () 07/12/2013 postreply 21:01:35

回复:回复:招人:SoC Physical Design Engineer -azurelan- 给 azurelan 发送悄悄话 (77 bytes) () 07/12/2013 postreply 21:18:14

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